1. Field of Invention
The present disclosure relates to an electrical circuit. More particularly, the present invention relates to a phase-locked loop (PLL).
2. Description of Related Art
With advances in technology, high frequency (e.g., in range of THz) circuits have been applied to various field, such as communication, biomedical imaging and spectroscopy for sensing and detection.
Phase-locked loops (PLLs) are common circuits in signal processing systems, for locking a reference clock signal. Generally, the PLL includes a phase-frequency detector (PFD), a voltage-controlled oscillator (VCO), and a feedback circuit for feeding an output clock signal outputted by the VCO to the PFD. In a high frequency signal processing system, due to the frequency of the output clock signal outputted by the VCO is higher than the operating frequencies of the PFD and a traditional frequency divider, a high frequency PLL commonly uses an injection-locked frequency divider (ILFD) as a prescaler, so as to down convert the frequency of the output clock signal outputted by the VCO in the feedback circuit. However, any frequency misalignment between ILFD and VCO may cause improper divider output frequency and PLL fail to lock.